1. Field of the Invention
The present invention relates to memory devices and, in particular, to a flash memory device and a fabrication method thereof.
2. Background of the Related Art
FIG. 1 illustrates a related art Floating-gate Tunneling Oxide (FLOTOX) Electrically Erasable and Programmable Read Only Memory (EEPROM). An active region 1a and a field region 1b are formed on the upper surface of a semiconductor substrate 1. In the semiconductor substrate 1, source and drain regions 2 and 3 are formed. A gate insulation layer 4 and a tunnel insulation layer 5 are formed within the active region 1a of the semiconductor substrate 1. A first conductive layer (floating gate) 6 is formed on the upper surfaces of the gate insulation layer 4 and the tunnel insulation layer 5. An interlayer insulation film 7 is formed on the upper surface of the first conductive layer 6. A second conductive layer (control gate) 8 is formed on the upper surface of the interlayer insulation film 7. An insulation film 9 is formed on the upper surfaces of the semiconductor substrate 1 and the second conductive layer 8.
In operation, twenty volts (20V) is supplied to the control gate 8 and zero volts (0V) is supplied to the drain 3. The source 2 and the substrate 1 are connected to ground. Electrons are injected into the floating gate 6 from the drain 3 through the tunnel insulation layer 5 via a Folwer-Nordheim (FN) tunneling effect. Electrons accumulate in the floating gate 6, the threshold voltage of the device increases, and the intensity of the electric field, which is applied from the control gate 8 to the drain 3, increases.
To erase the data from the FLOTOX EEPROM, the source 2 and the semiconductor substrate 1 are connected to ground, zero volts is supplied to the control gate 8 and twenty volts are supplied to the drain 3. Electrons accumulated in the floating gate 6 are moved into the drain region 3 through the tunnel insulation layer 5 via the FN tunneling effect. Since the number of electrons in the floating gate 6 decrease, the threshold voltage of the FLOTOX EEPROM decreases, and the intensity of the electric field, which is applied from the drain 3 to the control gate 8, also decreases.
The related art FLOTOX EEPROM requires a high voltage during programming and data erasing operations, and a high substrate current is generated due to the high voltage during data erasing operations. As a result, the characteristics of the FLOTOX EEPROM and the tunnel insulation layer 5 are quickly degraded.
In addition, due to the high substrate current generated, it is not possible to erase the data in the related art FLOTOX EEPROM using a 5-volt power source. Furthermore, it is not possible to perform a self-aligning process during the fabrication process for the related art FLOTOX EEPROM.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.